1. Field of the Invention
The invention relates to a BiCMOS semiconductor device, and more particularly to a BiCMOS semiconductor device having an improved high frequency and high speed performance.
2. Description of the Related Art
Scaling down of BiCMOS semiconductor devices has been improved by developments of self alignment techniques and microlithography. The improvement in the scaling down of the BiCMOS semiconductor device has also provided an improvement in a high frequency and high speed performance of the BiCMOS semiconductor device. Further improvement of the high frequency and high speed performance of the BiCMOS semiconductor device however requires a further improvement in performance in speed of a bipolar transistor involved in the BiCMOS semiconductor device. Conventional techniques for improvement in performance in the speed of the bipolar transistor are disclosed in the Japanese laid-open patent applications Nos. 2-106937 and 1-289163 in which the bipolar transistor is made of silicon system materials for improvements in the current gain and for reduction of base resistance. Another conventional technique for applying a Si/SiGe hetero-junction bipolar transistor having a SiGe base layer to the BiCMOS semiconductor device is disclosed by K. Imai et al., 1990 IEEE BCTM, pp. 90-93. The bipolar transistor has a structure as illustrated in FIG. 1. Then, the bipolar transistor has a p-type silicon substrate 601, an n-type buried layer 602, an n-type collector layer 603, isolation regions 604, an n-type collector plug layer 605, a p-type external base layer 606, a p-SiGe base layer 607 formed by molecular beam epitaxy, an n.sup.- -Si epitaxial layer 608 formed by molecular beam epitaxy, an n-type emitter layer 609 and an n.sup.+ -type polysilicon layer 610. The bipolar transistor has an impurity concentration profile in a direction at depth as illustrated in FIG. 2 in which a first region 701 corresponds to the polysilicon layer 610 having an impurity concentration in the range of from 1.times.10.sup.20 to 1.times.10.sup.21 cm.sup.-3 and a thickness in the range of from 150 to 250 nanometers. A second region 702 corresponds to the silicon epitaxial layer 608 having an impurity concentration in the range of from 5.times.10.sup.17 to 1.times.10.sup.19 cm.sup.-3 and a thickness in the range of from 10 to 100 nanometers. A third region 703 corresponds to the p-SiGe base layer 607 having an impurity concentration in the range of from 1.times.10.sup.18 to 5.times.10.sup.19 cm.sup.-3 and a thickness in the range of from 10 to 100 nanometers in which Ge is included in the range of from 5 to 20%. A fourth region 704 corresponds to the collector layer 603 and the buried layer 602 in which the collector layer 603 has an impurity concentration in the range of from 1.times.10.sup.16 to 5.times.10.sup.17 cm.sup.-3 and the buried layer 602 has a high impurity concentration in the range of from 1.times.10.sup.19 to 1.times.10.sup.21 cm.sup.-3 for reduction of the collector resistance.
The above described conventional bipolar transistor has serious problems as follows. Process for forming the BiCMOS semiconductor device involving the bipolar transistor includes a heat treatment that may cause a thermal diffusion of p-type impurity boron involved in the p-SiGe base layer 607 into the n-type collector layer 603 thereby a boundary between the base region and the collector region moves toward the collector region as represented broken line 705 in FIG. 2. The diffusion of the p-type impurity boron from the base region into the collector region results in a shift of the boundary between the base and collector regions toward the collector region, while a boundary between the SiGe layer and the Si layer or the hetero-junction still remain. The discrepancy of the boundary between the base-collector regions from the SiGe/Si hetero-junction creates a parasite-potential barrier 709 in the base region but at an adjacent portion to the collector region as illustrated in FIG. 3. As described above, the boron doped p-SiGe base layer 607 is grown by molecular beam epitaxey where the p-SiGe base layer 607 remains within a region 706. However, the deposited p-SiGe base layer 607 is then subjected to an influence due to a heat treatment carried out after the deposition of the base layer 607. The p-type impurity boron in the base layer 607 shows a thermal diffusion toward the collector region to move in a Si diffusion region 707 thereby the base region 706 also expands to the diffusion region 707. Then, a region 708 represents a base layer 607 comprising the p-SiGe region 706 and the p-Si region 707 after the thermal diffusion of the boron occurs. As well known, silicon germanium has a narrower band gap than a band gap of silicon. Then, the resultant base region 607 comprises the p-SiGe region 706 and the p-Si region 707 in which the p-SiGe region 706 has a narrower band gap than a band gap of the p-Si region 707. In the base region 708, the wider band gap of the p-Si region 707 constitutes the parasitic potential barrier 709 in the p-Si region 707. A relationship between a height of the parasitic potential barrier 709 and a degree of the boron diffusion is disclosed by Prinz et al. in 1989, IEDM Technical Digest, pp. 639-641. The parasitic potential barrier 709 prevents electrons in the SiGe region 706 from being injected into the collector region thereby resulting in a reduction of the number of electrons able to reach to the collector region. Namely, collector current is reduced.
The parasitic potential barrier also provides a drop of a cutoff frequency f.sub.T thereby resulting in a deterioration of a high sped performance of the hetero-junction bipolar transistor. The drop of the cutoff frequency is as large a collector current density is high. A relationship of the cutoff frequency versus the collector current is illustrated in FIG. 4 for the hetero-junction bipolar transistor 710 having the parasitic potential barrier 709 as described above and a homo-junction bipolar transistor 711. From FIG. 4, it could be understood that in a high cutoff frequency region region the homo-junction bipolar transistor 711 has a higher cutoff frequency than a cutoff frequency of the hetero junction bipolar transistor 710, while in a low cutoff frequency region the homo-junction bipolar transistor 711 has a lower cutoff frequency than a cutoff frequency of the hetero-junction bipolar transistor 710.
The parasitic potential barrier also provides a delay in base traveling time of electrons. FIG. 5 illustrates a ratio of the base traveling time of boron-diffused base region to the diffusion-free base region versus a depth of the boron diffusion toward the collector region. From FIG. 5, it is understood that a boron diffusion at a depth of 10 nanometers or more results in increase of the base traveling time. Particularly, a boron diffusion at a large depth more than 20 nanometers results in a considerable increase of the base traveling time. The increase of the base traveling time provides a drop of the cutoff frequency of the bipolar transistor. The drop of the cutoff frequency leads to a poor high frequency performance of the bipolar transistor. Accordingly, the boron diffusion from the base region toward to collector region provides a poor high frequency performance to the bipolar transistor.
In the BiCMOS semiconductor device, the bipolar transistor is operated in a high collector current region for high speed charge and discharge operation of an output load capacitance. As described above, the hetero-junction bipolar transistor 710 has the low cutoff frequency in the high collector current region rather than the homo-junction bipolar transistor. In summary, using the bipolar transistor having the parasitic potential barrier results in inferior performance of the BiCMOS semiconductor device. The hetero-junction bipolar transistor with the parasitic potential barrier used in the BiCMOS semiconductor device and being operated in the high collector current region has an inferior driving ability to drive the load capacitance a compared to the homo-junction bipolar transistor.
To settle the above problem with the inferiority of the load capacitance driving ability due to the parasitic potential barrier, it was proposed to enlarge an emitter size because the enlargement of the emitter size results in raising the cutoff frequency f.sub.T. Nevertheless, to secure the necessary high cutoff frequency, the hetero-junction bipolar transistor requires a larger emitter size than an emitter size of the homo-junction bipolar transistor by two to four times. Such a large emitter size for the hetero-junction bipolar transistor makes it difficult to obtain the necessary high density integration of the BiCMOS semiconductor device. Such inferior device performance of the hetero-junction bipolar transistor is due to the necessity for operation in the high collector current region for driving the load capacitance.
On the other hand, when the hetero-junction bipolar transistor is used in an emitter coupled logic circuit, the bipolar transistor is operated in a relatively low collector current region. In each a case, the hetero-junction bipolar transistor with the parasitic potential barrier is relatively free from the problem with the drop of the cutoff frequency and the inferiority in the device performance.
In any event, the conventional hetero-junction bipolar transistor used in the BiCMOS semiconductor device has been engaged with the above serious problems because, in the prior art, it is difficult to use a low temperature and short time heat treatment that suppresses the boron diffusion toward the collector region.